TY  - GEN
AU  -  Uyemura, John P. (John Paul)
TI  - Chip design for submicron VLSI : CMOS layout and Simulation
T2  - 24332
SN  - 9788131501955
U1  - 621.3815 
PY  - 2006///
CY  - New Delhi
PB  - Cengage Learing.
KW  -  VLSI
ER  -